- PCIe is a full featured memory mapped bus more akin to a network than a bus.
This is just a test, please ignore it for now ....
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Interface Repository
The GreenSocs interface repository contains information about all ESL interfaces.
An interface could be a bus, or a serial wire. It could pass from model to model, or model to the simulation environment.
Here you will find:
- Header files to be used with TLM 2.0 library
- IPXACT tags
- Examples of SystemC code for each interface, normally including any form of router that would make sense with the interface.
Each interface is built from a "protocol". A protocol is made from 3 main parts:
- The "base protocol" - the basic type of this protocol, for instance, a memory mapped bus will normally use the OSCI GP as it's base.
- Extension to that base protocol - we call these "quarks"
- Both the base and the quarks will identify timing points in the protocol. These are called Phases. The phases may be defined or used by several quarks and or the base protocol.
Browse Interfaces | Browse Base Protocols | Browse Quarks | Browse Phases