This library provides a language extension for SystemC along with a design methodology for describing and simulating dynamically reconfigurable hardware systems at all levels of abstraction. It provides maximum freedom of description of reconfiguration and its control, while featuring simulation of run-time configuration, removal and exchange of custom modules as well as third-party IP-cores during the complete refinement process. When designing at RT-level the resulting hardware description can easily be synthesized by standard synthesis tools.The underlying simulation engine allows safe disabling and re-enabling of all process types without altering the kernel. Control statements which allow safe process controlling are provided.